From the heady days of Windows 3.0, 486s, and 25 MHz, we now look to Windows NT and Pentium IIs at speeds of 300 MHz.
| 1989 |
April
Intel 486DX, 25 MHz
165-mm2 die, 1.2 million transistors
First truly pipelined x86; has 8K of L1 cache and a math coprocessor. |
May
Windows 3.0
Windows' first commercial success. |
| 1990 |
September
Motorola 68040; 20, 33 MHz
153-mm2 die, 1.2 million transistors
Upgrades 68030 architecture; has a memory management unit and FPU. |
| 1991 |
September
Intel 486SX, 16 MHz
316-mm2 die, 1,185,000 transistors
Lower-cost 486 without the FPU; still has a 32-bit bus interface. |
| 1992 |
February
DEC Alpha 21064, 150 MHz
234-mm2 die, 1.7 million transistors
Superscalar and superpipelined 64-bit architecture; has a very high clock rate (150 is quickly revved to 200) |
March
Intel 486DX2, 50 MHz
230-mm2 die, 1.2 million transistors
First x86 chip with external bus running at half the core speed.
OS/2 2.0 |
April
Windows 3.1 |
May
Cyrix 486SLC, 25 MHz
108-mm2 die, 600,000 transistors
Has a 486-type core with a 386SX bus interface; lacks on-chip FPU. |
| 1993 |
March
Intel Pentium, 60 MHz
294-mm2 die, 3.1 million transistors
First dual-pipelined superscalar x86, borrows RISC techniques. |
April
AMD 486, 33 MHz
89-mm2 die, 1 million transistors
PowerPC 601; 50, 66 MHz
120-mm2 die, 2.8 million transistors
Revives Macintosh line; a hybrid design that borrows bus logic from Motorola's 88100 RISC chip; intended to run Mac OS, OS/2, and Windows NT. |
October
PowerPC 603; 66, 80 MHz
83-mm2 die, 1.6 million transistors
First true PowerPC architecture; meant for use in portables. |
December
Cyrix 486DX, 33 MHz
196-mm2 die, 1.1 million transistors |
| 1994 |
March
Intel 486DX4; 75, 100 MHz
87-mm2 die, 1.6 million transistors
Clock-tripled core (bus runs at 25 or 33 MHz), includes 16K of L1 cache; first 486 to run at 3.3V internally. |
April
PowerPC 604, 100 MHz
197-mm2 die, 3.6 million transistors
Motorola 68060; 40, 66 MHz
217-mm2 die, 2.5 million transistors
Dual-pipelined 68000-family processor; meant to be a Pentium competitor, but does not gain mainstream market acceptance. |
September
DEC Alpha 21164; 266, 300 MHz
314-mm2 die, 9.3 million transistors
NexGen Nx586, 70 MHz (PR75)
118-mm2 die, 3.5 million transistors
MHz no longer tells the story. The P-rating, or PR-rating, uses performance on our Winstone test to position the chip; a PR75 means this chip performs on a par with a Pentium/75. |
October
OS/2 Warp, Version 3 |
| 1995 |
February
PowerPC 603e, 100 MHz
98-mm2 die, 2.6 million transistors |
May
Windows NT 3.51 |
July
Cyrix 5x86, 100 MHz
144-mm2 die, 1.9 million transistors |
August
Windows 95 |
November
Intel Pentium Pro; 150, 200 MHz
196-mm2 die, 5.5 million transistors
First sixth generation x86, is mounted in a new dual-cavity package with L2 cache on-board running at full CPU speed; optimized to run 32-bit code.
Cyrix 6x86, 100 MHz (PR120)
173-mm2 die, 3 million transistors |
| 1996 |
February
OS/2 Warp Server, Version 4 |
March
AMD K5, 75 MHz (PR75)
177-mm2 die, 4.3 million transistors |
July
Windows NT 4.0 |
| 1997 |
January
Intel Pentium MMX, 166 MHz
128-mm2 die, 4.5 million transistors
Adds 57 multimedia instructions to the x86 instruction set, unchanged since 1985. |
February
Cyrix MediaGX, 133 MHz
134-mm2 die, 2.4 million transistors
Value-oriented chip with the graphics controller, DRAM controller, and PCI bus interface on-chip. |
March
DEC Alpha 21164PC, 400-533 MHz
137-mm2 die, 3.4 million transistors
Lower-cost chip intended to compete with mainstream x86 desktops. |
April
AMD K6; 166, 233 MHz
162-mm2 die, 8.8 million transistors
Originally a NexGen design; incorporates MMX and competes with Pentium II at the same MHz level. |
May
Intel Pentium II; 233, 300 MHz
203-mm2 die, 7.5 million transistors
Mainstream Pentium Pro with MMX instructions; introduces new cartridge and connector design; comfortable running Windows 95.
Cyrix 6x86MX; 133 MHz (PR166), 187.5 MHz (PR233)
194-mm2 die, 6 million transistors
Has MMX and is meant to compete with Pentium MMX and Pentium IIs. |
June
PowerPC 604e; 166, 200 MHz
148-mm2 die, 5.1 million transistors |
September
Intel Pentium MMX mobile; 200, 233 MHz
95-mm2 die, 4.5 million transistors
First Intel CPU using .25µ process; uses just 1.8V internally |
| The Future |
Late 1997 or early 1998
Windows 95 successor (Memphis) |
1998
Intel Deschutes, 300-400 MHz
Intel's first mobile Pentium II.
Windows NT 5 (Cairo)
Intel Katmai
Pentium II design with rumored MMX2, a 100-MHz system bus, larger L1 cache.
Intel Willamette
Enhanced Pentium Pro core; may outrun Pentium II and Deschutes by 50 percent. |
1999
Intel/HP Merced
May have a 300-mm2 die and run at 600 MHz; 64-bit chip, the beginning of IA-64 architecture, (will still run x86 code) |
